Evaluation of Drive Topologies for Macro Scale Synchronous Electrostatic Machines

Macro scale electrostatic machines have promising characteristics for low speed direct drive applications. However, their medium voltage (7kV) and low current (<; 1A) characteristics provide a unique challenge for power electronics. Models for the semiconductors, electrostatic machine, and magnetic components were combined to perform a simulation-based comparison between the standard two-level voltage and current source inverter topologies. A low current 10 kV JFET super-cascode was modelled based off static and dynamic characterizations for the switch. Inductors were designed for the CSI dc-link and the VSI output filters and the improved generalized steinmetz equation algorithm modeled magnetic core loss. System losses and harmonic content, combined with implementation considerations, form a basis to compare the two inverter topologies. The comparison shows that the current source inverter is a better choice for a variable-speed drive with a wide operating range, especially at higher speeds. The voltage source inverter topology is speed limited due to the resonance between the inductive output-filter and capacitive machine. However, at low speeds, the VSI can provide high efficiency (~90%) over a wide operating range, suitable for “position and hold” applications.