Digital Evolution of the Quadrature Balanced Power Amplifier Transceiver for Full Duplex Wireless Operation

This letter compares analog and digital implementations of quadrature balanced power amplifier (QBPA) transceiver for full-duplex wireless operation. The design considerations of both architectures are laid out, and a comprehensive performance comparison between the two approaches based on theoretical and experimental results is proposed. For this end, a new QBPA chip prototype employing voltage-mode switched-capacitor RF DACs was fabricated in TSMC's 65 nm CMOS, whereas the analog QBPA, reported in our previous work, comprises 180 nm CMOS current-mode class-AB PAs. We demonstrate that while both techniques can achieve deep interference cancellation, the switched-capacitor QBPA (SC-QBPA) exhibits considerably better performance in terms of noise figure (NF), linearity, and system efficiency. At 8 dB backoff from 20 dBm peak TX power, the SC-QBPA achieves 17 dB improvement in NF and 10 dB better linearity. The analog QBPA, on the other hand, can reach higher operating frequencies and has 1.4 dB lower RX insertion loss.