Design, Optimization and Implementation of a new low phase noise 2.4 GHz differential push-push VCO in a 0.25 µm BICMOS SiGe:C Technology

Design and implementation of a differential push-push voltage controlled oscillator (VCO), operating at 2.4 GHz, is presented in this paper. A presentation in space of the phase noise analysis and a graphical optimization method are used to obtain the optimum phase noise of the differential push-push oscillator with respect all design constraints. The proposed architecture is implemented in the 0.25 μm BICMOS SiGe:C process of NXP Semiconductor. For only power dissipation 100mW, the proposed oscillator generates a phase noise of -131.5dBc/Hz @1MHz frequency offset at 2.4GHz with post layout simulation results. The core chip size is 1.6×1.1 mm
²
, with including the totality of the pads.