Design of a Low-Dropout Linear Regulator

This paper introduces a low-dropout linear regulator with an operating voltage of 2.5V. An anti-overshoot circuit is added to the error amplifier, and the regulator module is optimized based on circuit stability performance; Add trim function to feedback resistance network so that LDO can output different voltage values such as 1.1V, 1.8V and 2.2V according to various needs. The circuit is simulated by Cadence based on HLMC 40nm CMOS process. The results show that the LDO has a minimum rejection ratio of -35dB and a maximum of -56dB.