Guest Editor's Introduction: Special Section on Reliability-Aware Design and Analysis Methods for Digital Systems: From Gate to System Level

The fourteen articles in this special section represent world-leading current research into reliability-aware design methods for digital systems and provide interesting and valuable insights into current and future trends in the considered research areas. The focus on these articles is on investigating novel solutions for the reliability-aware design and analysis in digital systems, comprising a large number of issues and aspects (e.g. fault tolerance techniques, circuit aging and security), focusing on various architectures and devices (such as combinatorial circuits, memories, NoCs or FPGAs), and acting at different levels of abstraction (from circuit level to system level).