Low-Power Single-Transistor Voltage-Mode Third-Order All-pass Filter in 65-nm CMOS

This work proposes a new third-order wide-band all-pass filter (APF) circuit as a true time delay (TTD) element. The proposed APF is a voltage-mode circuit which only includes one transistor, one inductor, two resistors, and two capacitors. Post-layout simulation results in 65-nm CMOS process are used to validate the performance of the proposed circuit. The presented third-order CMOS APF achieves a group delay (GD) of 65.4 ps for about 12.7 GHz bandwidth while it consumes only 597 μW. It also demonstrates a delay-bandwidth (DBW) of 0.83. Finally, the presented APF achieves an input-referred IP3 of 8.32 dBm and occupies an area of 148μm × 201μm.