A Systematic Approach for Internal Entropy Boosting in Delay-based RO PUF on an FPGA

Physical Unclonable Functions (PUFs) use process variation, random and unpredictable errors introduced during chip manufacturing, to create a silicon fingerprint for each IC. In this paper, we describe two new implementations of the ring oscillator (RO) PUF, a parallel and a serial scheme. The two schemes are tested on Xilinx Spartan 7 FPGAs with an 8-bit input challenge and an 8-bit output response. Our designs have the advantage of taking up less area with no decrease in performance metrics of reliability, randomness, and uniqueness. Our serial scheme uses a linear feedback shift register and scrambler to generate more than one output bit using the same set of ring oscillators for the same input challenge. Our parallel scheme shows a higher speed and more randomness. We argue that our serial scheme can be designed to be just as random, reliable, and unique as a parallel scheme while using less hardware.