Built-in Self-Test of Vector Matrix Multipliers on a Reconfigurable Device

An analog Vector Matrix Multiplier (VMM) along with its interface through Multi-Input Translinear Elements (MITE) is compiled on a reconfigurable Field Programmable Analog Array (FPAA) on a 350nm process. The paper focuses on the tuning algorithm to set the weights on the VMM as well as to produce levels of voltage near the power supply rails, V
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, to the source-driven VMMs, by application of a wide range of input levels. The constraints during the design and implementation process, accounting for the mismatch in devices, are discussed. A significant reduction in the variation in the levels of the desired voltage has been demonstrated in the paper.