Design of a 100W Radiation-Tolerant Power-Factor-Correction Buck AC/DC Converter

With regard to the high-luminosity upgrade of the Large Hadron Collider (LHC) at the European Organization for Nuclear Research (CERN), much of the electronics is being redesigned. This includes the Distributed Input/Output Tier (DI/OT) project which aims to standardize high-reliability and high-availability custom electronics in radiation-exposed areas. This paper presents the design of a 100W radiationtolerant AC/DC converter, developed using commercial-off-the-shelf (COTS) components, to be used for powering the DI/OT crates, compatible with the CompactPCI-Serial standard (CPCI-S.0). The converter uses a non-isolated power-factor-correction (PFC) buck topology that takes universal AC input and gives a 36–72 V DC bus with a 10% or better peak-to-peak ripple. A subsequent DC/DC converter provides the required safety isolation and the backplane voltage rails (i.e. 12 V, 5 V) for the control cards in the crate. In order to implement a COTS-based radiation-tolerant PFC buck converter, the power MOSFET has to be severely over-rated in terms of blocking voltage (VDSS). Additionally, the gate drive voltage (VGS) has to be lower than normal so as to minimize threshold voltage drift with Total Ionizing Dose (TID). Both these derating measures lead to efficiency degradation owing to higher on-state resistance (RDS,on) compared to typical cases. This paper also proposes design measures that can be taken to improve efficiency (up to 85–90%) in spite of the above constraints. This enables low-cost radiation-tolerant power supply development capable of withstanding a TID of 300 Gy, based on component-level radiation tests.