Implementation of High Resolution Digital Pulse Width Modulator Based on FPGA

Conventional pulse width modulators (PWM) for radar detection application are analogue with complex architecture or digital with a low degree of accuracy. PWMs implemented with simple architecture and high resolution are essential requirements of modern embedded system for performing diversified control tasks. The previously reported PWMs are not ideal in terms of simple architecture, and high resolution. This work proposed four digital pulse width modulators that cater to these two major design concerns. Mixed-mode clock manager(MMCM) block and digital programmable circuit are employed as fundamental resources to construct the field programmable gate array(FPGA) based DPWM. Corresponding solutions together with simple architecture and high resolution DPWMs based on Flip flop(FF), counter, and carry chain utilizing ZYN Q - 7020 FPGA are discussed and presented respectively. At the same time, experimental results indicate a high resolution of 20.03ps achieved by the MMCM based DPWM, while the carry chain based DPWM leads to a 592ps resolution. The proposed architectures are validated using ALINX AX7020 development board.