A 65 nm CMOS Transmitter Chain for Scalable 28 GHz Phased-Array Systems

A compact, scalable, and low power direct conversion transmitter chain for 28 GHz phased-array systems is presented. The chain comprises a sub-sampling PLL operating from a 1 GHz reference clock, a high-side double-balanced up-conversion mixer with an IF input at 5 GHz, and a two-sage class AB power amplifier. A chip prototype was fabricated in TSMC's 65 nm bulk CMOS and characterized in measurement. The transmitter chain supports up to 2 GHz signal bandwidth, consumes 70 mW at OP1dB of 11 dBm, and achieves -32 dB EVM for a 480 MHz OFDM signal at 8 dB backoff from OP1dB.