Transceiver Architectures for Fully Integrated Frequency Division Duplex (FDD) Systems with Wideband TX Interference Cancellation

In this paper, we present an overview of the challenges in frequency division duplex (FDD) integrated transceivers and propose new architectural concepts that can meet demanding FDD performance requirements and be fully integrated on-chip. System-level simulations using TSMC's 65 nm bulk CMOS technology confirm that the proposed architectures can operate in FDD mode for TX powers higher than 20 dBm with lower than 1 dB degradation in TX and RX insertion losses over a frequency range wider than 1 GHz under antenna mismatches and high TX noise floor.