Reflection-Based Short Pulse Generation in CMOS

In this letter, a low cost, compact, and systematic method for generating a short pulse and efficiently delivering it to low impedance loads is proposed. The load can be a resistive on-chip or off-chip load, an antenna, or another stage such as a power combiner. The technique is inspired by time-domain reflectometry from a short-circuited termination. The technique is fully compatible with the CMOS technology. To show the feasibility of the idea, two chips are fabricated and tested in a low cost 0.11-μm CMOS process with f_T ≈ 80GHz. The full-width at half maximum (FWHM) of the pulses are 6.8ps and 8.8ps, and the amplitudes over a 50 Ω load are 0.62V and 1V. Either of the chips occupies 1160 × 540 μm² in area.