Active Dual Level Gate Driver for Dead Time and Switching Losses Reduction in Drive Systems

Most of the motor driving systems are still using IGBTs as power switches. Switching efficiency – strictly related to switching losses and switching frequency - is of the utmost importance at system level. IGBTs are traditionally driven using a fixed output current, but this solution does not take into account Miller Capacitance (Crss) non-linearity effects. As Crss value spreads of one or even more order of magnitude over the collector-to-emitter voltage (V
CE
) swing, the fixed current produces two different dV/dt on the inverter output. This affect switching performances increasing switching losses, due to a slow transient of the IGBT’s gate and VCE, and reducing the possibility of increasing the switching frequency. In order to solve this issue, a two-step gate driver is proposed in this paper, with a focus on experimental results. The proposed solution has been implemented in an integrated circuit developed in a $1 {\mu} \mathrm{m}$ High Voltage (HV) SOI technology. Concept, circuit’s features and bench results are presented, highlighting the advantages of this solution and defining future improvements.