Machine Learning for LLR Estimation in Flash Memory With LDPC Codes

As the density of flash memory is increasing to improve storage capacity, it also becomes more vulnerable to reading errors. Hence it is common practice to employ error-correcting codes, such as low-density parity check (LDPC) codes. To exploit the error-correcting capability of these codes, soft input must be provided to the decoder. This means that the flash memory controller needs to be able to provide reliability values, which is usually obtained through multiple `soft' reads of the cells in the form of log-likelihood ratios (LLR). However finding these reliabilities with high accuracy is not easy with very few reads. In this brief we present a novel approach to estimate the LLRs based on a previous idea by Sharon et al. for regular LDPC codes. We present a low-complexity solution using machine learning and also an extension to irregular LDPC codes. A neural network is trained with offline data (simulated or measured) for a wide range of operating conditions and can then be applied to flash memory readings. By simulations we show that this provides good performance with only a small loss compared with genie-aided LLRs.