A 10-Bit 100-MS/s SAR ADC with Always-on Reference Ripple Cancellation

This paper presents an always-on reference ripple cancellation technique that actively cancels the reference settling error throughout the entire SAR conversion process, thus significantly relaxing reference settling requirement. Equipped with the proposed technique, a 100-MS/s prototype SAR ADC only requires a 0.5-pF decoupling capacitor and an on-chip low-power reference buffer that consumes 60% less power compared to state-of-the-art designs with similar performance. Fabricated in 40 nm CMOS, it achieves an SNDR of 56.3 dB at Nyquist rate while consuming 1.4 mW, including the reference buffer.