A Study on the Mechanical Debonding Process through Static-Elastic Stress Analysis for 3-D Wafer Level Packages (WLPs)

We have conducted a stress distribution analysis of temporary carrier debonding process to improve the throughput yield of HBM (High Bandwidth Memory) by optimizing the process condition. In this study, we have built a theoretical model of the mechanical debonding process as a static-elastic cantileverlike system. The result indicates maximum stresses being applied on the vicinity of the wafer edge. We have found the optimal force combinations that alleviate the stresses through numerical simulations under the practical conditions and in-situ experiments, which have led to the new standard process condition. The optimized debonding condition have been successfully applied to the mass production of the HBM products, achieving no wafer crack.