Correction of Delay-Time-Induced Maximum Junction Temperature Offset During Electrothermal Characterization of IGBT Devices

The lifetime evaluation is strongly influenced by the measurement accuracy of the junction temperature with the V
_ce
(T) method during power cycling test (PCT). However, the measurement delay time tmd, the time between which the load current is switched off and the test pulse is applied, induces a maximum junction-temperature offset ΔT
_jm
. The JEDEC [1] suggested square root t method is found only to be suitable for devices with surface-close heat generation and will induce errors for other devices such as IGBTs. In this article, two novel methods, the simulated ΔZ
_th
and the Cauer thermal model, are proposed. The principle and accuracy of these two methods are discussed in detail. Furthermore, the measured Z
_th
curve, or the Foster thermal model method, is proven not suitable for the correction of the maximum junction-temperature offset, as it will induce the same error as the square root t method.