A 28-GHz Stacked Power Amplifier with 20.7-dBm Output P1dB in 28-nm Bulk CMOS

A fully integrated power amplifier (PA) for 5G communication systems is realized in a 28-nm bulk CMOS technology. Power combining and stacking techniques are used to achieve a fairly high output power level. The realized PA shows a measured power gain of 20.4 dB and a 20.7-dBm output-referred 1-dB compression point, P
_1dB
. The saturated power, P
_SAT
, and the peak PAE are 21.5 dBm and 26%, respectively. The results of tests carried out with a 64-QAM-modulated input signal with 100-MHz bandwidth and 10-dB PAPR without using any digital predistortion are also reported. In these conditions, the PA shows a -25-dB EVM for a 13.4-dBm average output power and 7.3% average PAE. To the best of our knowledge, the presented PA shows the highest P
_SAT
and P
_1dB
among bulk CMOS PAs at mm-wave frequencies.