ECG Signal Filtering in FPGA

In this paper we used two different filtering methods for ECG signal processing. The signal is processed in Spartan-3E FPGA circuits using a mean filter with a 16-sample window first, and then using a low-pass filter generated by the FDA Tool utility in the MATLAB environment. Both filtering algorithms are implemented in FPGAs using the Verilog Hardware Description Language. The results are compared with each other, then with those obtained in the MATLAB environment. The paper also analyses the hardware resources in the FPGA required for the two implementations. The signal was previously recorded using a 12-bit acquisition system and a sampling rate of 1 kHz.