Multi-hit time-to-digital converter VLSI for high-energy physics experiments

A multi-hit time-to-digital converter VLSI has been developed using a CMOS 0.3 /spl mu/m gate-array technology. The chip is designed for use in a high-energy physics experiment ATLAS. Precise timing signals are generated from 16 taps of an asymmetric ring oscillator oscillating at 80 MHz and controlled by a PLL circuit. A prototype chip has been developed, and a time resolution of 300 ps RMS was obtained. Many macro cells are developed to achieve such high resolution still using commercial gate-array technology.