Non-Isothermal Simulations to Optimize SiC MOSFETs for Enhanced Short-Circuit Ruggedness

Non-Isothermal simulations to understand Short-Circuit (SC) behavior of SiC MOSFETs were performed. Using the established model, structures to enhance the SC ruggedness were proposed. Thin gate oxide and a narrow JFET region are shown to reduce saturation current enhancing SC ruggedness without increasing R
_on,sp
. Results indicate thin gate oxide offers moderate improvement in SC capability, at the cost of increased C
_gs
. In contrast, narrow JFET region provides much improved (2×) SC ruggedness, as well as lower R
_on,sp
, with no negative impact on C
_gs
.