A 28.5 GB/s CMOS non-blocking router for terabit/s connectivity between multiple processors and peripheral I/O nodes

A 28.5 GB/s data router enables a terabits/s bandwidth network. The 6.6M transistor 0.18 /spl mu/m 1.3 V 15 W CMOS LSI has three clocking domains that synchronize data through four 1.06 GB/s links, a B-port crossbar, and five point-to-point links of 4.75 GB/s data throughput each. Test data rates are up to 6.4 Gb/s per wire.