A 6 b 1.3 GSample/s A/D converter in 0.35 /spl mu/m CMOS

Using array averaging and a wideband track-and-hold, a 6 b flash ADC achieves better than 5.5 effective bits for input frequencies to 600 MHz at 1 GSample/s, and 5 effective bits for 650 MHz input at 1.3 GSample/s. It consumes 500 mW from 3.3 V and occupies 0.8 mm/sup 2/ in 0.35 μm CMOS.