A 10 Gb/s CMOS clock and data recovery circuit with frequency detection

A 10 Gb/s phase-locked clock and data recovery circuit incorporates a multiphase LC oscillator and a half-rate phase/frequency detector with automatic data retiming. In 0.18 /spl mu/m CMOS technology, the circuit exhibits 1.43 GHz capture range and 0.8 ps rms jitter with length 2/sup 23/ PRBS. The power dissipation is 91 mW from a 1.8 V supply.