PCB-Interposer-on-DBC Packaging of 650 V, 120 A GaN HEMTs

Packaging of gallium nitride (GaN) HEMTs is challenging due to their high heat-flux density and small bonding pads. And, having a lateral device structure and being able to switch fast, these devices push the limit of packaging by demanding extremely low parasitic inductances. In this work, we developed a packaging approach based on embedding the GaN device chip between a printed-circuit board (PCB) interposer structure for terminal interconnection and a direct- bond-copper (DBC) substrate for heat extraction. The approach was demonstrated by packaging 650 V, 120 A GaN HEMT bare die. We also used silver sintering for bonding all of the device terminals to increase heat extraction from the device’s thermal pad and avoid relying on multiple, different melting-point solders in the construction. FEA simulations showed that the package had a gate-to-kelvin source inductance (L
G
+ L
ss
) of 3.1 nH, a drain-to-source inductance (L
D
+ L
s
) of 1.2 nH, and a junction-to-case thermal resistance, R
θjc
, of 0.14°C/W. Static characteristics of the PCB-on-DBC packages were measured by a curve tracer.