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Wafer-Scale Si–GaN Monolithic Integrated E-Mode Cascode FET Realized by Transfer Printing and Self-Aligned Etching Technology | IEEE Journals & Magazine | IEEE Xplore

Wafer-Scale Si–GaN Monolithic Integrated E-Mode Cascode FET Realized by Transfer Printing and Self-Aligned Etching Technology


Abstract:

In this article, Si (100) inks' array is integrated on SiN/AlGaN/GaN substrate to demonstrate a zero deviation and wafer-scale Si-GaN monolithic integration by transfer p...Show More

Abstract:

In this article, Si (100) inks' array is integrated on SiN/AlGaN/GaN substrate to demonstrate a zero deviation and wafer-scale Si-GaN monolithic integration by transfer printing and self-aligned etching technology. During the heterogeneous integration process, it does not depend on any equipment, such as metal-organic chemical vapor deposition (MOCVD) (epitaxial growth) and wafer bonding machine (wafer bonding) which are costly. The transferred Si and SiN/AlGaN/GaN substrates show an excellent interface morphology. Based on this material system, the monolithic integrated E-mode cascode FETs are demonstrated with good uniformity. The IGS is below 10-5 mA/mm within a large gate voltage swing of ±18 V. Threshold voltages of a series of cascode FETs are extracted as 2.2 V (±0.2 V). This novel low-cost technology shows great potential in monolithic heterogeneous integration.
Published in: IEEE Transactions on Electron Devices ( Volume: 67, Issue: 8, August 2020)
Page(s): 3304 - 3308
Date of Publication: 19 June 2020

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