A Dynamic Frequency Scaling Framework Against Reliability and Security Issues in Multi-tenant FPGA

The deployment of cloud-FPGA, although significantly improves the performance and efficiency of conventional cloud computing, also creates a unique attack surface. For example, the power distribution network (PDN) of a multitenant FPGA can be manipulated by malicious users to cause voltage-drop, which can be used to inject timing faults to the applications of victim users. In addition, since most cloud-FPGAs are being used for computation-intensive tasks that consume a large amount of power, therefore, typical FPGA applications may still encounter reliability issues even without malicious PDN manipulation. To comprehensively mitigate both reliability and security issues of multi-tenant FPGAs, this paper proposes a dynamic frequency scaling (DFS) framework, which can dynamically scale the clock frequency of FPGA applications. Specifically, the DFS framework utilizes a delay-frequency pair table, which can match the real-time clock frequency with voltage level, thus avoiding potential errors caused by voltage-drop.