A DC-50 GHz CMOS Switched-Type Attenuator With Capacitive Compensation Technique

This paper presents an ultra-broadband 5-bit switched-type attenuator (STA). Three attenuation topologies are employed for the design of the attenuation cells, including the T-type, simplified T-type and Π-type topologies. For each attenuation topology, the optimal values of the series and shunt resistors are derived to achieve accurate amplitude tuning and ensure good impedance matching. The capacitive compensation technique is adopted by both the T-type and Π-type topologies to enhance the high-frequency performance. Based on the proposed optimization techniques, a systematic design methodology is developed for the STA. The 5-bit STA is implemented in 65-nm CMOS technology and occupies a core chip area of only 0.036 mm
²
. It exhibits ultra-broadband operation with 15.5-dB amplitude tuning range and 0.5-dB tuning step. The insertion loss of the reference state is 1.5 - 5.9 dB from DC to 50 GHz. The return loss is better than 12 dB for all the 32 states. The RMS amplitude error and phase error are less than 0.25 dB and 3.5° over the DC - 50 GHz band.