Abstract:
Vertical optimization of DSP algorithms, analog electronics, optical components and PCB design is critical to maximize the SNR limit of the digital coherent MODEM. We dem...Show MoreMetadata
Abstract:
Vertical optimization of DSP algorithms, analog electronics, optical components and PCB design is critical to maximize the SNR limit of the digital coherent MODEM. We demonstrate a record net ISD of 10.82b/s/Hz for a vertically optimized 256QAM transceiver operating at a symbol rate >50GBd.
Date of Conference: 08-12 March 2020
Date Added to IEEE Xplore: 04 May 2020
ISBN Information:
Conference Location: San Diego, CA, USA
Contents 