Hardware Architecture Design for Template Matching

This paper presents the hardware architecture for ORB (Oriented FAST and Rotated BRIEF) based template matching that can overcome delay problems due to the high computation inherent in existing template matching techniques. The proposed method converts the extracted Canny edge image and FAST corner image into a bit string. It then compares the bit string data to locate the template image in the input image. Template matching is a technology used in various fields, such as object tracking and motion tracking. Because template matching has a long computation time, a solution to this issue has been widely researched in many industrial fields. To solve this problem, we designed a hardware structure based on XILINX Virtex7 (XC7V2000TT1FG1925-1 FPGA using Verilog-HDL).