A Power-Aware Heterogeneous Architecture Scaling Model for Energy-Harvesting Computers

Energy-harvesting devices are the key to enabling future ubiquitous sensing applications, because they are long lived and require little maintenance. On-device processing of sensed data, such as images, avoids the high energy cost of communicating data to the edge or cloud. This letter observes that the on-device computing performance of an energy-harvesting system depends not only on execution time, but also on energy collection time. With high input power, a faster, higher-power processor quickly completes processing because energy collection time is low. At low input power, a slower, more energy efficient processor minimizes end-to-end latency by more judiciously using the slowly collected energy. This letter describes the PHASE model, which captures this charge latency effect. Using the model, we develop PHASE architectures, which include heterogeneous processing components of different efficiency and performance. A PHASE architecture uses the combination of heterogeneous components that minimizes end-to-end latency, including recharge time. Our results show that the PHASE model helps understand end-to-end latency in an energy harvesting device, yielding PHASE architectures that complete up to
$9\times$
more work on a fixed energy budget than typical energy-harvesting architecture.