Modernization of Low-Temperature JFET Models Built into LTspice CAD Systems, Taking into Account the Results of their Experimental Study

The results of experimental studies of the current-voltage characteristics (CVC) of silicon n-JFET and p-JFET manufactured at JSC INTEGRAL (Minsk, Belarus) at temperatures from minus 195°C up to 30°C are considered. A hardware-software complex and a JFET automated measurement technique are created. Refined approximations of the temperature dependences of the Spice parameters of JFETs are given, which provide a good agreement between the results of measurements and simulation of the CVC. The created models are intended primarily for computer simulation of low-temperature effects in analog ICs in the LTspice CAD.