A Novel Fast Clocking PN Code Acquisition Synchronizer

Pseudo Noise (PN) code is one of the most well-known codes for spreading and secure information in Wireless Communication Systems (WCS) and recently for estimating the carrier and the frame timing information for advanced multipath resistive OFDM systems. Synchronization, with its two steps (acquisition and tracking), is a challenging task for such Multiple Access Systems (MAS). In this paper a Novel Fast Clocking Acquisition Synchronizer (NFCAS) which is based on parallel code phases comparison is designed, modeled, simulated and practically implemented using Field Programmable Gate Array (FPGA). In the proposed synchronizer a fast clock is introduced to speed up the synchronization process. The synchronizer shows a very fast, reliable and direct synchronization in one step rather than two steps. Also the simulation and practical results show a perfect consistency for codes synchronization time which is inversely proportional to the ratio between the introduced fast acquisition clock and the common (transmitter/receiver) traditional slow clock.