Effect of Sampling on Steady-State Time-Varying Output of DPWM Controlled Buck Converter

Recent development in digital electronics has made digital processors preferable to drive power electronics converter based applications. In this paper, an exhaustive analysis of the effect of sampling on the instantaneous steady-state output responses of the buck converter is performed. The effects of sampling on the average output of DC-DC converters are found in the literature. However, the analysis of time-dependent responses is essential for applications where control precision and instantaneous values are significant. This paper shows the impact of the sampling on the gate pulse for buck-converter in terms of duty ratio and time delay. Mathematical analyses are performed to show the effect of this delay and duty ratio variation on the steady-state output voltage and current. A relationship is established among time delay, multisampling factor, and duty ratio. The analysis is verified mathematically, and the supporting results are obtained from both simulation environment and experimental prototype.