Ultralow- ${k}$ Dielectric With Structured Pores for Interconnect Delay Reduction

An ultralow-k dielectric using structured pores to reduce interconnect propagation delay is demonstrated. By using a carbon nanotube (CNT) template, porous oxide with vertical cylindrical pores is formed on the Si3N4 etch-stop layer and successfully integrated with the copper damascene process. The resulting dielectric is anisotropic with an interlayer dielectric constant of k = 1.97 and an intralayer dielectric constant of k = 1.75 at a porosity of 65%. Compared with the conventional porous material with randomly arranged spherical pores, a much higher elastic modulus of 15.7 GPa is achieved to allow the chemical mechanical polish process at a porosity of 65%.