A fresh look at thermal resistance in electronic packages

Existing thermal resistance component characterization techniques are inadequate. The associated errors are too great and uncertain. In emerging packages like BGA, CSP and COB, the effects of the board cannot be ignored. System designers require a quick and reliable estimating technique. Various definitions and standards for electronic package thermal resistance have been proposed by component manufacturers and standards organizations. All shared the same objective: to meet practical requirements of electronic packages. This paper illustrates correlation of thermal resistance measurement for an electronic package for comparison with computer simulated values. The simulation is carried out based on JEDEC standards. However, JEDEC standards provide a means for comparison of packages rather than determining package thermal resistance in a given environment. Thus, there is a need to convert the data obtained by JEDEC standards to actual environmental situations. Another important factor which is normally overlooked is the effect of temperature (case or reference) on the thermal resistance under operating conditions. All these factors affect the evaluation of thermal resistance in from interpretation of the results obtained by experiment and simulation in comparison to reality. Problems in recent years have increased in view of the miniaturization and consequent increase in heat flux levels. In addition, the package has to meet more stringent requirements for harsh environments in some cases. This paper takes a fresh look at the determination of thermal resistance, taking into account the various factors discussed above.