Design and Implementation of Drivers and Selectors for Content Addressable Memory (CAM)

Content addressable memory (CAM) is a hardware search engine used for speeding look-up operation in various applications. CAM implementation requires several input and output driver circuits for writing/searching/matching. This paper presents the required I/O processing peripherals with all necessary circuits, dedicated functionality and discussions for completing a CAM architecture. Row decoder (address input decoder) activates a specific row in an array so that bitline drivers come into operation to store predefined data at the specified CAM cells. Search driver fetches user defined data and pass on to the parallel search lines of each location of CAM array. Column of sense amplifiers associating match-lines (MLs) of each location process the voltage change in the MLs during a CAM search. Priority encoder (address output encoder) is used at the last stage to code the address of the matching location, a priority is usually used in case of multiple matches to decide the best match location. These encoders and decoders should work in synchronous with the related drivers for CAM read-in (write) and read-out (search/matching) operations in their respective cycles. These utilities of driver circuits for CAM will be helpful and ease of reference for memory designers while integrating proper choice of peripheral circuits in a memory chip.