Dynamic modeling of hysteresis-free negative capacitance in ferroelectric/dielectric stacks under fast pulsed voltage operation

To overcome the fundamental limit of the transistor subthreshold swing of 60 mV/dec at room temperature, the use of negative capacitance (NC) in ferroelectric materials was proposed [1]. Due to the recent discovery of ferroelectricity in CMOS compatible HfO
₂
and ZrO
₂
based thin films [2], [3], the promise of ultra-low power steep-slope devices seems within reach. However, concerns have been raised about switching-speed limitations and unavoidable hysteresis in NC devices [4], [5]. Nevertheless, it was shown that NC effects without hysteresis can be observed in fast pulsed voltage measurements on ferroelectric/dielectric capacitors [6], which was recently confirmed using ferroelectric Hf
_0.5
Zr
_0.5
O
₂
[7], [8]. While in these works only the integrated charge after each pulse was studied, here we investigate for the first time if the transient voltage and charge characteristics are also hysteresis-free.