Vertical Heterojunction Ge0.92Sn0.08/Ge Gate-All-Around Nanowire pMOSFETs

Vertical heterojunction Ge
_0.92
Sn
_0.08
/Ge gate-all-around (GAA) nanowire pMOSFETs fabricated with a top-down approach are reported. With optimized processes, pFETs with nanowire diameters as small as 40 nm were achieved and a decent I
_ON
/I
_oFF
ratio of ~4×10
⁴
was obtained due to the GAA nanowire geometry and the GeSn/Ge heterostructure. Devices with larger nanowire diameters exhibited higher I
_ON
, I
_ON
/I
_OFF
ratio and transconductance. Similar subthreshold swing (SS) characteristics were present in pFETs with various nanowire diameters considering the compensating effect between top source resistance and gate electrostatics induced by nanowire diameter.