FPGA Based Powerline and Baseline Interference Removal in Electrocardiogram Using Modified EWT-DWT Filtering

Electrocardiogram is a widely used method in every hospital for identifying the heart condition of the patient. To obtain successful diagnosis, the analysis performed on the signal should be accurate. Hence, in this paper we proposed a modified algorithm for denoising powerline and baseline noise in electrocardiogram signals. The filtering algorithm was modified such as cubic splining was used to modify conventional Empirical Wavelet Transform (EWT) and soft thresholding for the Discrete Wavelet Transform (DWT). The effectiveness of the proposed method was tested in two manners. One is by using the records from Physiobank ATM database ECG recordings, and the other is by using the three-lead ECG device to measure the ECG signal from the patient. IoT Maker 1000 FPGA was used for the signal processing since it is intended to be the starting design for a fog-computing server for local processing of ECG signals in a mobile medical service system. An average of 4.69 dB SNR improvement has been achieved using the proposed method of denoising, which proves higher compared to other existing methods such as DWT (2.63dB) and EWT (4.52dB). Based on two-factor ANOVA test, the researchers claimed that the proposed method has a significant difference compared with the other two filtering algorithms. The hardware implementation of the proposed algorithm was successfully achieved and the result is visually comparable to an industrial ECG machine.