An Ultra Low-Power Low-Cost EEPROM for UHF RFID Tags in a Single-Poly 90 nm CMOS Process

An ultra low-power low-cost EEPROM design for passive UHF RFID tags in a single-poly 90 nm CMOS process is presented. The designed EEPROM block has a capacity of 400 bits and it is powered by supplies of 0.72 V and 1.2 V. Three different read approaches were implemented. A dual-output DC-DC converter was designed with adjustable parameters such as power, frequency, and output voltage levels. It has a sequential pumping function to minimize its current consumption. The block supports 16-bit writing and single-bit dynamic reading. A signal indicating insufficient power for write operation is generated by the block. Either the all pages writing or even-odd pages writing is available for testing. The typical working frequency is 1.92 MHz. The power consumption of the block is lower than 0.1/1.0/10 uW in standby/read/write mode, respectively. The total area of the block is less than 0.2 × 0.3 mm
²
.