VLSI Design of Analog DFT Processor for Demodulation of QAM-OFDM Signal

DFT and IDFT are the important components of OFDM receiver and transmitter respectively. Fast Fourier transform (FFT) is an important algorithm for computing DFT. The radix-2 algorithm has been very popular for its simplicity but for higher point DFT calculation higher radix algorithms such as radix-4 are best suited. This has the advantage of lower computational complexity thus making this algorithm for efficient hardware implementation. Discrete time analog hardware implementation of DFT will definitely relieve the precision burden of power hungry ADCs in the receiver and it will also take less area on Silicon. Here a 16-point analog DFT processor using radix-4 FFT algorithm is proposed which is used to demodulate 16 symbol QAM modulated OFDM. The VLSI hardware is current mode circuit which only uses cascode current mirror as circuit element. The simulation work in support of proposed theory has in carried out in SPICE using BSIM4 65nm CMOS process.