A 18.6 fJ/bit/dB Power Efficient Active Inductor-based CTLE for 20 Gb/s High Speed Serial Link

A low-power receiver front end (RFE) for a high speed serial interface with a 3-stage continuous time linear equalization (CTLE) was designed in 28nm CMOS technology. The CTLE uses a transconductance-based active inductor for high frequency operation and for area reduction. The active inductor can be tuned around 10 GHz while consuming 11.17 mW from 0.9 V power supply. The CTLE compensates about 19.5 dB of attenuation due to the channel at a data rate of 20 Gb/s per link, with a power efficiency of 18.6 fJ/bit/dB, nearly 4X better power efficiency than the previous works reported in the literature. It shows prominence in the receivers used for wireline I/O interfaces like USB 3.2 and PCI Express 4.0.