The Study of Warpage of an Embedded Substrate of the Flip Chip Chip Size Package

Here we present the investigation of warpage of the embedded trace substrate of the flip-chip chip size package (FCCSP-ETS). Factors of layer thickness, substrate dimension, difference of thermal expansion coefficient difference, Young's module difference, curing temperature, and curing time were investigated for minimizing the warpage of the FCCSP-ETS substrate.