Implementation of Sobel Edge Detection algorithm and VGA display based on FPGA

Sobel algorithm is one of the commonly used algorithms to realize image edge detection, which is simple and efficient. Compared with the software, the algorithm based on FPGA has the advantage of fast speed, and can directly control the VGA display to display the detection results. In this paper, Verilog language is used to design the Sobel algorithm code and VGA display control code, which can detect the edge of the picture and display it directly on the display. The algorithm uses parallel processing, which is 9 times faster than serial processing. The complete design is verified on the Cyclone II series FPGA chip of Altera, and the results are correct. The design can be used in image edge detection of embedded devices.