FPGA Embedded TEMAC IP Core Performance Test Based on BIST

The FPGA embedded TEMAC (Tri-mode Ethernet Media Access Control) IP core can implement the general MAC functions, which can greatly improve the data transmission rate. But there are some problems with the TEMAC performance test using FPGA internal resources, such as high complexity and low precision. This paper designed a BIST structure for TEMAC performance test, which can count the test data frames returned by TEMAC and then get the TEMAC throughput ratio, packet loss ratio and delay. By comparing the test results of the BIST structure and the theoretical values, the test results show that the designed BIST performance test accuracy meets the RFC2544 test specification on these three performance indicators.