The Design and Implementation of High Speed Hybrid Radices Reconfigurable FFT Processor

In this paper, a new hybrid radices reconfigurable FFT processor is proposed, which supports computing modes of radixes 2/4/8 and their combination, satisfying 2
ⁿ
(n=6,7 ..., 15) point FFT calculation. This processor provides a sharing for different radices FFT, and proposes the radix-4/8 address conflict-free rule from radix-2 FFT address conflict-free rule. The data prefetching ensures uninterrupted operation-flow and improves the calculation speed. This design performs functional verification on Xilinx XC7V2000T FPGA, and performs the layout under the TSMC 28nm process with a working frequency above 800MHz and an area of 1.15 mm
²
. The calculation speed approaches the theoretical value of the given the number of butterfly units, and the calculation accuracy reaches 10
^-5
.