Anti-Disturbance Bumpless Transfer Control for Switched Systems With its Application to Switched Circuit Model

A control scheme is developed to estimate and then restrain the unavailable disturbance input of switched systems (SSs), while ruling out the large and sudden jumps in the control input. The suppression on the unavailable disturbance and that on the oscillations in the control input are measured by H
_∞
anti-disturbance (AD) property and bumpless transfer (BT) property, respectively. Through construction of a switching rule, a disturbance observer together with a controller, a sufficient condition is obtained to ensure the H
_∞
AD property and the BT performance. At last, a verification of the developed control scheme is offered by adjusting the power voltage of a switched RLC circuit model.