A Novel Low-Latency Regional Fault-Aware Fault-Tolerant Routing Algorithm for Wireless NoC

WiNoC has become a promising on-chip interconnect architecture. Due to the integration and manufacturing limits of wireless interconnects in nanotechnology, WiNoC systems are more susceptible to high failure rates. In this paper, we propose a novel fault-tolerant routing algorithm based on regional fault-aware techniques for link failures in WiNoC. We trade off performance and overhead by adopting 2-hop awareness for wireless nodes and 1-hop awareness for wired nodes. And the node status is not defined merely based on its own faulty condition but with a “double sensing” mechanism. Besides, since congestion is prone to occur around faulty nodes, we consider congestion mitigation in fault-tolerant algorithm design. Simulation results demonstrate that compared with several counterparts, the performance benefits clearly overweigh the overhead with acceptable area increase. The newly proposed routing algorithm significantly enhances the robustness of the system.